BibTeX record conf/ats/YeLWZZH23

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@inproceedings{DBLP:conf/ats/YeLWZZH23,
  author       = {Shi{-}Jie Ye and
                  Yun{-}Ju Liu and
                  Liuzheng Wang and
                  Hui{-}Ling Zhen and
                  Wei{-}Ming Zhang and
                  Yu Huang},
  title        = {Fault Simulation Acceleration Based on {ARM} Multi-core {CPU} Architecture},
  booktitle    = {32nd {IEEE} Asian Test Symposium, {ATS} 2023, Beijing, China, October
                  14-17, 2023},
  pages        = {1--5},
  publisher    = {{IEEE}},
  year         = {2023},
  url          = {https://doi.org/10.1109/ATS59501.2023.10317970},
  doi          = {10.1109/ATS59501.2023.10317970},
  timestamp    = {Mon, 11 Dec 2023 08:33:40 +0100},
  biburl       = {https://dblp.org/rec/conf/ats/YeLWZZH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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