Teruhiko Yamada Koji Yamazaki Edward J. McCluskey A simple technique for locating gate-level faults in combinational circuits. 65-70 1995 conf/ats/1995 Asian Test Symposium http://csdl.computer.org/comp/proceedings/ats/1995/7129/00/71290065abs.htm db/conf/ats/ats1995.html#YamadaYM95