BibTeX record conf/ats/ShimizuIK02

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@inproceedings{DBLP:conf/ats/ShimizuIK02,
  author       = {Kazuya Shimizu and
                  Noriyoshi Itazaki and
                  Kozo Kinoshita},
  title        = {Crosstalk Fault Reduction and Simulation for Clock-Delayed Domino
                  Circuits},
  booktitle    = {11th Asian Test Symposium {(ATS} 2002), 18-20 November 2002, Guam,
                  {USA}},
  pages        = {176--181},
  publisher    = {{IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1109/ATS.2002.1181707},
  doi          = {10.1109/ATS.2002.1181707},
  timestamp    = {Fri, 24 Mar 2023 00:02:33 +0100},
  biburl       = {https://dblp.org/rec/conf/ats/ShimizuIK02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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