Kazumi Hatayama Mitsuji Ikeda Masahiro Takakura Satoshi Uchiyama Yoriyuki Sakamoto Application of a Design for Delay Testability Approach to High Speed Logic LSIs. 112-115 1997 conf/ats/1997 Asian Test Symposium http://csdl.computer.org/comp/proceedings/ats/1997/8209/00/82090112abs.htm db/conf/ats/ats1997.html#HatayamaITUS97