BibTeX
@inproceedings{DBLP:conf/async/MekieCSVT06,
author = {Joycee Mekie and
Supratik Chakraborty and
Dinesh K. Sharma and
Girish Venkataramani and
P. S. Thiagarajan},
title = {Interface Design for Rationally Clocked GALS Systems},
booktitle = {ASYNC},
year = {2006},
pages = {160-171},
ee = {http://doi.ieeecomputersociety.org/10.1109/ASYNC.2006.19},
crossref = {DBLP:conf/async/2006},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
@proceedings{DBLP:conf/async/2006,
title = {12th IEEE International Symposium on Asynchronous Circuits
and Systems (ASYNC 2006), 13-15 March 2006, Grenoble, France},
booktitle = {ASYNC},
publisher = {IEEE Computer Society},
year = {2006},
isbn = {0-7695-2498-2},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Copyright © 2007-01-15 by Michael Ley (ley@uni-trier.de)