BibTeX record conf/async/Josephs07

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@inproceedings{DBLP:conf/async/Josephs07,
  author       = {Mark B. Josephs},
  title        = {Gate-level modelling and verification of asynchronous circuits using
                  {CSPM} and {FDR}},
  booktitle    = {13th {IEEE} International Symposium on Asynchronous Circuits and Systems
                  {(ASYNC} 2007), 12-14 March 2006, Berkeley, California, {USA}},
  pages        = {83--94},
  publisher    = {{IEEE} Computer Society},
  year         = {2007},
  url          = {https://doi.org/10.1109/ASYNC.2007.19},
  doi          = {10.1109/ASYNC.2007.19},
  timestamp    = {Thu, 23 Mar 2023 23:58:24 +0100},
  biburl       = {https://dblp.org/rec/conf/async/Josephs07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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