BibTeX record conf/asscc/YokoyamaMONINYI18

• > Home > conf/asscc/YokoyamaMONINYI18

@inproceedings{DBLP:conf/asscc/YokoyamaMONINYI18,
  author       = {Yoshisato Yokoyama and
                  Tomohiro Miura and
                  Yukari Ouchi and
                  Daisuke Nakamura and
                  Jiro Ishikawa and
                  Shunya Nagata and
                  Makoto Yabuuchi and
                  Yuichiro Ishii and
                  Koji Nii},
  title        = {40-nm 64-kbit Buffer/Backup {SRAM} with 330 nW Standby Power at 65{\textdegree}C
                  Using 3.3 {V} {IO} MOSs for {PMIC} less {MCU} in IoT Applications},
  booktitle    = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2018, Tainan,
                  Taiwan, November 5-7, 2018},
  pages        = {9--12},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/ASSCC.2018.8579327},
  doi          = {10.1109/ASSCC.2018.8579327},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/asscc/YokoyamaMONINYI18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}