BibTeX record conf/asscc/ChenWLHL14

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@inproceedings{DBLP:conf/asscc/ChenWLHL14,
  author       = {Guan{-}Sing Chen and
                  Chin{-}Yang Wu and
                  Chen{-}Lun Lin and
                  Hao{-}Wei Hung and
                  Jri Lee},
  title        = {Fully-integrated 40-Gb/s pulse pattern generator and bit-error-rate
                  tester chipsets in 65-nm {CMOS} technology},
  booktitle    = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2014, KaoHsiung,
                  Taiwan, November 10-12, 2014},
  pages        = {109--112},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/ASSCC.2014.7008872},
  doi          = {10.1109/ASSCC.2014.7008872},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/asscc/ChenWLHL14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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