BibTeX record conf/aspdac/ZulehnerD0W19

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@inproceedings{DBLP:conf/aspdac/ZulehnerD0W19,
  author       = {Alwin Zulehner and
                  Kamalika Datta and
                  Indranil Sengupta and
                  Robert Wille},
  editor       = {Toshiyuki Shibuya},
  title        = {A staircase structure for scalable and efficient synthesis of memristor-aided
                  logic},
  booktitle    = {Proceedings of the 24th Asia and South Pacific Design Automation Conference,
                  {ASPDAC} 2019, Tokyo, Japan, January 21-24, 2019},
  pages        = {237--242},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3287624.3287672},
  doi          = {10.1145/3287624.3287672},
  timestamp    = {Sun, 20 Jan 2019 16:24:11 +0100},
  biburl       = {https://dblp.org/rec/conf/aspdac/ZulehnerD0W19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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