BibTeX record conf/aspdac/XuYLW0022

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@inproceedings{DBLP:conf/aspdac/XuYLW0022,
  author       = {Zihan Xu and
                  Lingfeng Yin and
                  Yongqiang Lyu and
                  Haixia Wang and
                  Gang Qu and
                  Dongsheng Wang},
  title        = {CacheGuard: {A} Behavior Model Checker for Cache Timing Side-Channel
                  Security: (Invited Paper)},
  booktitle    = {27th Asia and South Pacific Design Automation Conference, {ASP-DAC}
                  2022, Taipei, Taiwan, January 17-20, 2022},
  pages        = {19--24},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/ASP-DAC52403.2022.9712560},
  doi          = {10.1109/ASP-DAC52403.2022.9712560},
  timestamp    = {Wed, 07 Feb 2024 17:24:24 +0100},
  biburl       = {https://dblp.org/rec/conf/aspdac/XuYLW0022.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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