BibTeX record conf/aspdac/TsaiC05

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@inproceedings{DBLP:conf/aspdac/TsaiC05,
  author       = {Jeng{-}Liang Tsai and
                  Charlie Chung{-}Ping Chen},
  editor       = {Tingao Tang},
  title        = {Process-variation robust and low-power zero-skew buffered clock-tree
                  synthesis using projected scan-line sampling},
  booktitle    = {Proceedings of the 2005 Conference on Asia South Pacific Design Automation,
                  {ASP-DAC} 2005, Shanghai, China, January 18-21, 2005},
  pages        = {1168--1171},
  publisher    = {{ACM} Press},
  year         = {2005},
  url          = {https://doi.org/10.1145/1120725.1120932},
  doi          = {10.1145/1120725.1120932},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/TsaiC05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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