A Processor Generation Method from Instruction Behavior Description Based on Specification of Pipeline Stages and Functional Units.

Takeshi Shiro Masaaki Abe Keishi Sakanushi Yoshinori Takeuchi Masaharu Imai A Processor Generation Method from Instruction Behavior Description Based on Specification of Pipeline Stages and Functional Units. 286-291 2007 conf/aspdac/2007 ASP-DAC http://doi.ieeecomputersociety.org/10.1109/ASPDAC.2007.358000 db/conf/aspdac/aspdac2007.html#ShiroASTI07