BibTeX record conf/aspdac/SasanianSSZ09

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@inproceedings{DBLP:conf/aspdac/SasanianSSZ09,
  author       = {Zahra Sasanian and
                  Mehdi Saeedi and
                  Mehdi Sedighi and
                  Morteza Saheb Zamani},
  editor       = {Kazutoshi Wakabayashi},
  title        = {A cycle-based synthesis algorithm for reversible logic},
  booktitle    = {Proceedings of the 14th Asia South Pacific Design Automation Conference,
                  {ASP-DAC} 2009, Yokohama, Japan, January 19-22, 2009},
  pages        = {745--750},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {https://doi.org/10.1109/ASPDAC.2009.4796569},
  doi          = {10.1109/ASPDAC.2009.4796569},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/SasanianSSZ09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}