<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/aspdac/MineyamaIIOM08" mdate="2008-05-06">
<author>Akiko Mineyama</author>
<author>Hiroyuki Ito</author>
<author>Takahiro Ishii</author>
<author>Kenichi Okada</author>
<author>Kazuya Masu</author>
<title>LVDS-type on-chip transmision line interconnect with passive equalizers in 90nm CMOS process.</title>
<pages>97-98</pages>
<year>2008</year>
<booktitle>ASP-DAC</booktitle>
<ee>http://dx.doi.org/10.1109/ASPDAC.2008.4484069</ee>
<crossref>conf/aspdac/2008</crossref>
<url>db/conf/aspdac/aspdac2008.html#MineyamaIIOM08</url>
</inproceedings>
</dblp>
