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BibTeX record conf/aspdac/KuoYLJ13
@inproceedings{DBLP:conf/aspdac/KuoYLJ13, author = {Hsien{-}Kai Kuo and Ta{-}Kan Yen and Bo{-}Cheng Charles Lai and Jing{-}Yang Jou}, title = {Cache Capacity Aware Thread Scheduling for Irregular Memory Access on many-core GPGPUs}, booktitle = {18th Asia and South Pacific Design Automation Conference, {ASP-DAC} 2013, Yokohama, Japan, January 22-25, 2013}, pages = {338--343}, publisher = {{IEEE}}, year = {2013}, url = {https://doi.org/10.1109/ASPDAC.2013.6509618}, doi = {10.1109/ASPDAC.2013.6509618}, timestamp = {Wed, 16 Oct 2019 14:14:52 +0200}, biburl = {https://dblp.org/rec/conf/aspdac/KuoYLJ13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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