BibTeX
@inproceedings{DBLP:conf/aspdac/IizukaIA04,
author = {Tetsuya Iizuka and
Makoto Ikeda and
Kunihiro Asada},
title = {High speed layout synthesis for minimum-width CMOS logic
cells via Boolean satisfiability},
booktitle = {ASP-DAC},
year = {2004},
pages = {149-154},
ee = {http://doi.acm.org/10.1145/1015090.1015126},
crossref = {DBLP:conf/aspdac/2004},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
@proceedings{DBLP:conf/aspdac/2004,
editor = {Masaharu Imai},
title = {Proceedings of the 2004 Conference on Asia South Pacific
Design Automation: Electronic Design and Solution Fair 2004,
Yokohama, Japan, January 27-30, 2004},
booktitle = {ASP-DAC},
publisher = {IEEE},
year = {2004},
isbn = {0-7803-8175-0},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Copyright © 2006-02-10 by Michael Ley (ley@uni-trier.de)