Behavioral synthesis with activating unused flip-flops for reducing glitch power in FPGA.

Cheng-Tao Hsieh Jason Cong Zhiru Zhang Shih-Chieh Chang Behavioral synthesis with activating unused flip-flops for reducing glitch power in FPGA. 10-15 2008 ASP-DAC http://dx.doi.org/10.1109/ASPDAC.2008.4483919 conf/aspdac/2008 db/conf/aspdac/aspdac2008.html#HsiehCZC08