BibTeX record conf/aspdac/HeK98

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@inproceedings{DBLP:conf/aspdac/HeK98,
  author       = {Jiang{-}An He and
                  Hideaki Kobayashi},
  title        = {Simultaneous Wire Sizing and Wire Spacing in Post-Layout Performance
                  Optimization},
  booktitle    = {Proceedings of the {ASP-DAC} '98, Asia and South Pacific Design Automation
                  Conference 1998, Pacifico Yokohama, Yokohama, Japan, February 10-13,
                  1998},
  pages        = {373--378},
  publisher    = {{IEEE}},
  year         = {1998},
  url          = {https://doi.org/10.1109/ASPDAC.1998.669503},
  doi          = {10.1109/ASPDAC.1998.669503},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/HeK98.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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