@inproceedings{DBLP:conf/aspdac/DevlinIA11,
author = {Benjamin Stefan Devlin and
Makoto Ikeda and
Kunihiro Asada},
title = {A gate-level pipelined 2.97GHz Self Synchronous FPGA in
65nm CMOS},
booktitle = {ASP-DAC},
year = {2011},
pages = {75-76},
ee = {http://dx.doi.org/10.1109/ASPDAC.2011.5722288},
crossref = {DBLP:conf/aspdac/2011},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
@proceedings{DBLP:conf/aspdac/2011,
title = {Proceedings of the 16th Asia South Pacific Design Automation
Conference, ASP-DAC 2011, Yokohama, Japan, January 25-27,
2011},
booktitle = {ASP-DAC},
publisher = {IEEE},
year = {2011},
isbn = {978-1-4244-7516-2},
bibsource = {DBLP, http://dblp.uni-trier.de}
}