BibTeX record conf/aspdac/ChenSSSC17

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@inproceedings{DBLP:conf/aspdac/ChenSSSC17,
  author       = {Yu{-}Guang Chen and
                  Michihiro Shintani and
                  Takashi Sato and
                  Yiyu Shi and
                  Shih{-}Chieh Chang},
  title        = {Pattern based runtime voltage emergency prediction: An instruction-aware
                  block sparse compressed sensing approach},
  booktitle    = {22nd Asia and South Pacific Design Automation Conference, {ASP-DAC}
                  2017, Chiba, Japan, January 16-19, 2017},
  pages        = {543--548},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/ASPDAC.2017.7858380},
  doi          = {10.1109/ASPDAC.2017.7858380},
  timestamp    = {Mon, 17 Jun 2024 15:19:47 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/ChenSSSC17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}