BibTeX record conf/aspdac/ChenS00

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@inproceedings{DBLP:conf/aspdac/ChenS00,
  author       = {Chunhong Chen and
                  Majid Sarrafzadeh},
  title        = {Power reduction by simultaneous voltage scaling and gate sizing},
  booktitle    = {Proceedings of {ASP-DAC} 2000, Asia and South Pacific Design Automation
                  Conference 2000, Yokohama, Japan},
  pages        = {333--338},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/368434.368668},
  doi          = {10.1145/368434.368668},
  timestamp    = {Thu, 23 Mar 2023 23:58:21 +0100},
  biburl       = {https://dblp.org/rec/conf/aspdac/ChenS00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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