Architecture design of an H.264/AVC decoder for real-time FPGA implementation.

Thomas Warsaw Marcin Lukowiak Architecture design of an H.264/AVC decoder for real-time FPGA implementation. 253-256 2006 conf/asap/2006 ASAP http://doi.ieeecomputersociety.org/10.1109/ASAP.2006.17 db/conf/asap/asap2006.html#WarsawL06