BibTeX record conf/asap/QasaimehZJ21

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@inproceedings{DBLP:conf/asap/QasaimehZJ21,
  author       = {Murad Qasaimeh and
                  Joseph Zambreno and
                  Phillip H. Jones},
  title        = {An Efficient Hardware Architecture for Sparse Convolution using Linear
                  Feedback Shift Registers},
  booktitle    = {32nd {IEEE} International Conference on Application-specific Systems,
                  Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
                  July 7-9, 2021},
  pages        = {250--257},
  publisher    = {{IEEE}},
  year         = {2021},
  url          = {https://doi.org/10.1109/ASAP52443.2021.00044},
  doi          = {10.1109/ASAP52443.2021.00044},
  timestamp    = {Mon, 30 Aug 2021 15:34:32 +0200},
  biburl       = {https://dblp.org/rec/conf/asap/QasaimehZJ21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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