BibTeX record conf/arcs/MatsukawaNKSSOKYY14

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@inproceedings{DBLP:conf/arcs/MatsukawaNKSSOKYY14,
  author       = {Go Matsukawa and
                  Yohei Nakata and
                  Yuta Kimi and
                  Yasuo Sugure and
                  Masafumi Shimozawa and
                  Shigeru Oho and
                  Hiroshi Kawaguchi and
                  Masahiko Yoshimoto},
  editor       = {Walter Stechele and
                  Thomas Wild},
  title        = {A Low-Latency {DMR} Architecture with Efficient Recovering Scheme
                  Exploiting Simultaneously Copiable {SRAM}},
  booktitle    = {{ARCS} 2014 - 27th International Conference on Architecture of Computing
                  Systems, Workshop Proceedings, February 25-28, 2014, Luebeck, Germany,
                  University of Luebeck, Institute of Computer Engineering},
  pages        = {1--5},
  publisher    = {{VDE} Verlag / {IEEE} Xplore},
  year         = {2014},
  url          = {https://ieeexplore.ieee.org/document/6775097/},
  timestamp    = {Wed, 13 Mar 2024 20:26:53 +0100},
  biburl       = {https://dblp.org/rec/conf/arcs/MatsukawaNKSSOKYY14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}