Formal Verification of Software Designs in Hierarchical State Transition Matrix with SMT-based Bounded Model Checking.

Weiqiang Kong Noriyuki Katahira Masahiko Watanabe Tetsuro Katayama Kenji Hisazumi Akira Fukuda Formal Verification of Software Designs in Hierarchical State Transition Matrix with SMT-based Bounded Model Checking. 81-88 2011 APSEC http://doi.ieeecomputersociety.org/10.1109/APSEC.2011.17 conf/apsec/2011 db/conf/apsec/apsec2011.html#KongKWKHF11