BibTeX record conf/apccas/YanCH06

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@inproceedings{DBLP:conf/apccas/YanCH06,
  author       = {Jin{-}Tai Yan and
                  Bo{-}Yi Chiang and
                  Shi{-}Qin Huang},
  title        = {Width and Timing-Constrained Wire Sizing for Critical Area Minimization},
  booktitle    = {{IEEE} Asia Pacific Conference on Circuits and Systems 2006, {APCCAS}
                  2006, Singapore, 4-7 December 2006},
  pages        = {1276--1279},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/APCCAS.2006.342396},
  doi          = {10.1109/APCCAS.2006.342396},
  timestamp    = {Wed, 16 Oct 2019 14:14:50 +0200},
  biburl       = {https://dblp.org/rec/conf/apccas/YanCH06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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