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BibTeX record conf/apccas/WuYL08
@inproceedings{DBLP:conf/apccas/WuYL08, author = {Kai Pong Wu and Ching{-}Yuan Yang and Jung{-}Mao Lin}, title = {A 2.5Gb/s oversampling clock and data recovery circuit with frequency calibration technique}, booktitle = {{IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS} 2008, Macao, China, November 30 2008 - December 3, 2008}, pages = {1356--1359}, publisher = {{IEEE}}, year = {2008}, url = {https://doi.org/10.1109/APCCAS.2008.4746280}, doi = {10.1109/APCCAS.2008.4746280}, timestamp = {Wed, 16 Oct 2019 14:14:50 +0200}, biburl = {https://dblp.org/rec/conf/apccas/WuYL08.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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