BibTeX record conf/apccas/RauWL06

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@inproceedings{DBLP:conf/apccas/RauWL06,
  author       = {Jiann{-}Chyi Rau and
                  Po{-}Han Wu and
                  Chia{-}Jung Liu},
  title        = {A Novel Hardware Architecture for Low Power and Rapid Testing of {VLSI}
                  Circuits},
  booktitle    = {{IEEE} Asia Pacific Conference on Circuits and Systems 2006, {APCCAS}
                  2006, Singapore, 4-7 December 2006},
  pages        = {1883--1886},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/APCCAS.2006.342207},
  doi          = {10.1109/APCCAS.2006.342207},
  timestamp    = {Wed, 16 Oct 2019 14:14:50 +0200},
  biburl       = {https://dblp.org/rec/conf/apccas/RauWL06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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