Low Power BDD-based Synthesis Using Dual Rail Static DCVSPG Logic.

Gopal Paul S. N. Pradhan Ajit Pal Bhargab B. Bhattacharya Low Power BDD-based Synthesis Using Dual Rail Static DCVSPG Logic. 1504-1507 2006 conf/apccas/2006 APCCAS http://dx.doi.org/10.1109/APCCAS.2006.342508 db/conf/apccas/apccas2006.html#PaulPPB06