BibTeX record conf/apccas/ChingBYR10

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@inproceedings{DBLP:conf/apccas/ChingBYR10,
  author       = {Mai Y. Ching and
                  Ang T. Boon and
                  Chin K. Yeong and
                  Fakhrul Zaman Rokhani},
  title        = {Interconnect area, delay and area-delay optimization for multi-level
                  signaling on-chip bus},
  booktitle    = {{IEEE} Asia Pacific Conference on Circuits and Systems, {APCCAS} 2010,
                  Kuala Lumpur, Malaysia, December 6-9, 2010},
  pages        = {1143--1146},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/APCCAS.2010.5775086},
  doi          = {10.1109/APCCAS.2010.5775086},
  timestamp    = {Wed, 16 Oct 2019 14:14:50 +0200},
  biburl       = {https://dblp.org/rec/conf/apccas/ChingBYR10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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