DBLP BibTeX Record 'conf/aPcsac/WangWD06'

@inproceedings{DBLP:conf/aPcsac/WangWD06,
  author    = {Lei Wang and
               Zhiying Wang and
               Kui Dai},
  title     = {Cycle Period Analysis and Optimization of Timed Circuits},
  booktitle = {Asia-Pacific Computer Systems Architecture Conference},
  year      = {2006},
  pages     = {502-508},
  ee        = {http://dx.doi.org/10.1007/11859802_50},
  crossref  = {DBLP:conf/aPcsac/2006},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}
@proceedings{DBLP:conf/aPcsac/2006,
  editor    = {Chris R. Jesshope and
               Colin Egan},
  title     = {Advances in Computer Systems Architecture, 11th Asia-Pacific
               Conference, ACSAC 2006, Shanghai, China, September 6-8,
               2006, Proceedings},
  booktitle = {Asia-Pacific Computer Systems Architecture Conference},
  publisher = {Springer},
  series    = {Lecture Notes in Computer Science},
  volume    = {4186},
  year      = {2006},
  isbn      = {3-540-40056-7},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}