BibTeX record conf/aPcsac/RavindranM01

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@inproceedings{DBLP:conf/aPcsac/RavindranM01,
  author       = {Rajiv A. Ravindran and
                  Rajat Moona},
  title        = {Retargetable Cache Simulation Using High Level Processor Models},
  booktitle    = {6th Australasian Computer Systems Architecture Conference {(ACSAC}
                  2001), 29-30 January 2001, Gold Coast, Queensland, Australia},
  pages        = {114--129},
  publisher    = {{IEEE} Computer Society},
  year         = {2001},
  url          = {https://doi.org/10.1109/ACAC.2001.903371},
  doi          = {10.1109/ACAC.2001.903371},
  timestamp    = {Fri, 24 Mar 2023 00:04:08 +0100},
  biburl       = {https://dblp.org/rec/conf/aPcsac/RavindranM01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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