Two Cache Lines Prediction for a Wide-Issue Micro-architecture.

Shu-Lin Hwang Feipei Lai Two Cache Lines Prediction for a Wide-Issue Micro-architecture. 71-79 2001 conf/aPcsac/2001 ACSAC http://doi.ieeecomputersociety.org/10.1109/ACAC.2001.903361 db/conf/aPcsac/aPcsac2001.html#HwangL01