BibTeX record conf/IEEEssd/AnaneA15a

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@inproceedings{DBLP:conf/IEEEssd/AnaneA15a,
  author       = {Mohamed Anane and
                  Nadjia Anane},
  title        = {{SHA-2} hardware core for virtex-5 {FPGA}},
  booktitle    = {12th {IEEE} International Multi-Conference on Systems, Signals {\&}
                  Devices, {SSD} 2015, Mahdia, Tunisia, March 16-19, 2015},
  pages        = {1--5},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/SSD.2015.7348110},
  doi          = {10.1109/SSD.2015.7348110},
  timestamp    = {Mon, 09 Aug 2021 14:54:04 +0200},
  biburl       = {https://dblp.org/rec/conf/IEEEssd/AnaneA15a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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