Evaluating Register Allocation and Instruction Scheduling Techniques in Out-Of-Order Issue Processors.

Madhavi Gopal Valluri R. Govindarajan Evaluating Register Allocation and Instruction Scheduling Techniques in Out-Of-Order Issue Processors. 78-83 1999 IEEE PACT http://www.computer.org/proceedings/pact/0425/04250078abs.htm db/conf/IEEEpact/IEEEpact1999.html#ValluriG99