Scott Bardsley

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Hüseyin Dinc

> Home > Persons > Scott Bardsley

Publications

2020
[j5]
- view
  authority control:
- export record
  dblp key:
  - journals/jssc/AliDBBDMPP20
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/AliDBBDMPP20
Ahmed M. A. Ali, Hüseyin Dinc, Paritosh Bhoraskar, Scott Bardsley, Christopher Dillon, Matthew McShea, Joel Prabhakar, Scott Puckett:
A 12-b 18-GS/s RF Sampling ADC With an Integrated Wideband Track-and-Hold Amplifier and Background Calibration. IEEE J. Solid State Circuits 55(12): 3210-3224 (2020)
[c4]
- view
  authority control:
- export record
  dblp key:
  - conf/isscc/AliDBBDKMBPP20
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isscc/AliDBBDKMBPP20
Ahmed M. A. Ali, Hüseyin Dinc, Paritosh Bhoraskar, Scott Bardsley, Christopher Dillon, Mohit Kumar, Matthew McShea, Ryan Bunch, Joel Prabhakar, Scott Puckett:
16.1 A 12b 18GS/s RF Sampling ADC with an Integrated Wideband Track-and-Hold Amplifier and Background Calibration. ISSCC 2020: 250-252
2016
[c3]
- view
  authority control:
- export record
  dblp key:
  - conf/vlsic/AliDBPMZYDGLMMB16
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsic/AliDBPMZYDGLMMB16
Ahmed M. A. Ali, Hüseyin Dinc, Paritosh Bhoraskar, Scott Puckett, Andy Morgan, Ning Zhu, Qicheng Yu, Christopher Dillon, Bryce Gray, Jonathan Lanford, Matthew McShea, Ushma Mehta, Scott Bardsley, Peter R. Derounian, Ryan Bunch, Ralph Moore, Gerry Taylor:
A 14-bit 2.5GS/s and 5GS/s RF sampling ADC with background calibration and dither. VLSI Circuits 2016: 1-2
2010
[j4]
- view
  authority control:
- export record
  dblp key:
  - journals/jssc/AliMDPPBDHSBLBSS10
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/AliMDPPBDHSBLBSS10
Ahmed M. A. Ali, Andrew S. Morgan, Christopher Dillon, Greg Patterson, Scott Puckett, Paritosh Bhoraskar, Hüseyin Dinc, Mike Hensley, Russell Stop, Scott Bardsley, David Lattimore, Jeff Bray, Carroll Speir, Robert Sneed:
A 16-bit 250-MS/s IF Sampling Pipelined ADC With Background Calibration. IEEE J. Solid State Circuits 45(12): 2602-2612 (2010)

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.