Sanjay V. Rajopadhye

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Lakshminarayanan Renganarayanan

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Publications

2012
[j24]
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Lakshminarayanan Renganarayanan, DaeGon Kim, Michelle Mills Strout, Sanjay V. Rajopadhye:
Parameterized loop tiling. ACM Trans. Program. Lang. Syst. 34(1): 3:1-3:41 (2012)
2010
[c59]
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  - conf/cgo/YukiRRAEO10
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Tomofumi Yuki, Lakshminarayanan Renganarayanan, Sanjay V. Rajopadhye, Charles Anderson, Alexandre E. Eichenberger, Kevin O'Brien:
Automatic creation of tile size selection models. CGO 2010: 190-199
2008
[c55]
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  - conf/lctrts/RajopadhyeGR08
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Sanjay V. Rajopadhye, Gautam Gupta, Lakshminarayanan Renganarayanan:
A domain specific interconnect for reconfigurable computing. LCTES 2008: 79-88
[c54]
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Lakshminarayanan Renganarayanan, Sanjay V. Rajopadhye:
Positivity, posynomials and tile size selection. SC 2008: 55
2007
[c51]
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  - conf/ipps/RenganarayananHDR07
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Lakshminarayanan Renganarayanan, Manjukumar Harthikote-Matha, Rinku Dewri, Sanjay V. Rajopadhye:
Towards Optimal Multi-level Tiling for Stencil Computations. IPDPS 2007: 1-10
[c50]
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Lakshminarayanan Renganarayanan, DaeGon Kim, Sanjay V. Rajopadhye, Michelle Mills Strout:
Parameterized tiled loops for free. PLDI 2007: 405-414
[c48]
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DaeGon Kim, Lakshminarayanan Renganarayanan, Dave Rostron, Sanjay V. Rajopadhye, Michelle Mills Strout:
Multi-level tiling: M for the price of one. SC 2007: 51
2005
[c43]
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  - conf/lcpc/RenganarayanaRR05
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Lakshminarayanan Renganarayanan, U. Ramakrishna, Sanjay V. Rajopadhye:
Combined ILP and Register Tiling: Analytical Model and Optimization Framework. LCPC 2005: 244-258
2004
[c42]
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Lakshminarayanan Renganarayanan, Sanjay V. Rajopadhye:
A Geometric Programming Framework for Optimal Multi-Level Tiling. SC 2004: 18
2003
[c41]
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Lakshminarayanan Renganarayanan, Sanjay V. Rajopadhye:
Switched Memory Architectures-Moving Beyond Systolic Arrays. ASAP 2003: 28-39

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