Toshiaki Miyazaki

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Naohisa Ohta

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Publications

1996
[c8]
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Toshiaki Miyazaki, Akihiro Tsutsui, Kenji Ishii, Naohisa Ohta:
FACT: Co-evaluation Environment for FPGA Architecture and CAD System. FPL 1996: 34-43
[c7]
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Kazuhiro Hayashi, Toshiaki Miyazaki, Kazuhiro Shirakawa, Kazuhisa Yamada, Takaki Ichimori, Ken-nosuke Fukami, Naohisa Ohta:
A novel approach to real-time verification of transport system design using FPGA based emulator. RSP 1996: 5-10
1995
[j1]
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Toshiaki Miyazaki, Hiroshi Nakada, Akihiro Tsutsui, Kazuhisa Yamada, Naohisa Ohta:
Performance improvement technique for synchronous circuits realized as LUT-based FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 3(3): 455-459 (1995)
[c6]
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Kazuhiro Hayashi, Toshiaki Miyazaki, Kazuhiro Shirakawa, Kazuhisa Yamada, Naohisa Ohta:
Reconfigurable real-time signal transport system using custom FPGAs. FCCM 1995: 68-77
[c5]
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Toshiaki Miyazaki, Kazuhisa Yamada, Akihiro Tsutsui, Hiroshi Nakada, Naohisa Ohta:
Telecommunication-Oriented FPGA and Dedicated CAD System. FPL 1995: 54-67
[c4]
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  - conf/iccd/TsutsuiMYO95
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Akihiro Tsutsui, Toshiaki Miyazaki, Kazuhisa Yamada, Naohisa Ohta:
Special purpose FPGA for high-speed digital telecommunication systems. ICCD 1995: 486-491
1994
[c3]
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Toshiaki Miyazaki, Hiroshi Nakada, Akihiro Tsutsui, Kazuhisa Yamada, Naohisa Ohta:
A Speed-Up Technique for Synchronous Circuits Realized as LUT-Based FPGAs. FPL 1994: 89-98
[c2]
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  - conf/iccd/OhtaNYTM94
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Naohisa Ohta, Hiroshi Nakada, Kazuhisa Yamada, Akihiro Tsutsui, Toshiaki Miyazaki:
PROTEUS: Programmable Hardware for Telecommunication Systems. ICCD 1994: 178-183

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