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ORCIDEduard Cerny
- > Home > Persons > Eduard Cerny
Publications
- 2004
[j35]Ying Xu, Xiaoyu Song, Eduard Cerny, Otmane Aït Mohamed:
Model Checking for a First-Order Temporal Logic Using Multiway Decision Graphs (MDGs). Comput. J. 47(1): 71-84 (2004)- [j34]Otmane Aït Mohamed, Xiaoyu Song, Eduard Cerny, Sofiène Tahar, Zijian Zhou:
MDG-Based State Enumeration By Retiming And Circuit Transformation. J. Circuits Syst. Comput. 13(5): 1111-1132 (2004) - 2003
- [j33]Otmane Aït Mohamed, Xiaoyu Song, Eduard Cerny:
On the non-termination of M-based abstract state enumeration. Theor. Comput. Sci. 300(1-3): 161-179 (2003) - 1999
- [j31]Sofiène Tahar, Xiaoyu Song, Eduard Cerny, Zijian Zhou, Michel Langevin, Otmane Aït Mohamed:
Modeling and formal verification of the Fairisle ATM switch fabricusing MDGs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(7): 956-972 (1999) - 1998
- [c36]Ying Xu, Eduard Cerny, Xiaoyu Song, Francisco Corella, Otmane Aït Mohamed:
Model Checking for a First-Order Temporal Logic Using Multiway Decision Graphs. CAV 1998: 219-231 - [c31]Otmane Aït Mohamed, Eduard Cerny, Xiaoyu Song:
MDG-based Verification by Retiming and Combinational Transformations. Great Lakes Symposium on VLSI 1998: 356-361 - 1997
- [j28]Francisco Corella, Zijian Zhou, Xiaoyu Song, Michel Langevin, Eduard Cerny:
Multiway Decision Graphs for Automated Hardware Verification. Formal Methods Syst. Des. 10(1): 7-46 (1997) - [c30]Otmane Aït Mohamed, Xiaoyu Song, Eduard Cerny:
On the non-termination of MDGs-based abstract state enumeration. CHARME 1997: 218-235 - [c28]Eduard Cerny, Francisco Corella, Michel Langevin, Xiaoyu Song, Sofiène Tahar, Zijian Zhou:
Verification with Abstract State Machines Using MDGs. Formal Hardware Verification 1997: 79-113 - 1996
- [c26]K. D. Anon, N. Boulerice, Eduard Cerny, Francisco Corella, Michel Langevin, Xiaoyu Song, Sofiène Tahar, Ying Xu, Zijian Zhou:
MDG Tools for the Verification of RTL Designs. CAV 1996: 433-436 - [c24]Zijian Zhou, Xiaoyu Song, Sofiène Tahar, Eduard Cerny, Francisco Corella, Michel Langevin:
Formal Verification of the Island Tunnel Controller Using Multiway Decision Graphs. FMCAD 1996: 233-247 - [c23]Sofiène Tahar, Zijian Zhou, Xiaoyu Song, Eduard Cerny, Michel Langevin:
Formal Verification of an ATM Switch Fabric using Multiway Decision Graphs. Great Lakes Symposium on VLSI 1996: 106-111 - [c22]Michel Langevin, Sofiène Tahar, Zijian Zhou, Xiaoyu Song, Eduard Cerny:
Behavioral Verification of an ATM Switch Fabric using Implicit Abstract State Enumeration. ICCD 1996: 20-26 - 1995
- [c21]Francisco Corella, Michel Langevin, Eduard Cerny, Zijian Zhou, Xiaoyu Song:
State enumeration with abstract descriptions of state machines. CHARME 1995: 146-160 - [c19]Zijian Zhou, Xiaoyu Song, Francisco Corella, Eduard Cerny, Michel Langevin:
Partitioning transition relations efficiently and automatically. Great Lakes Symposium on VLSI 1995: 106-111
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