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Shuming Chen

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Shenggang Chen

> Home > Persons > Shuming Chen

Publications

2016
[j37]
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  - journals/taco/WangWCLCCZ16
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  - https://dblp.org/rec/journals/taco/WangWCLCCZ16
Yaohua Wang, Dong Wang, Shuming Chen, Zonglin Liu, Shenggang Chen, Xiaowen Chen, Xu Zhou:
Iteration Interleaving-Based SIMD Lane Partition. ACM Trans. Archit. Code Optim. 12(4): 58:1-58:18 (2016)
2015
[j30]
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  - journals/jece/ChenLJCGCC15
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  - https://dblp.org/rec/journals/jece/ChenLJCGCC15
Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen, Yang Guo, Shenggang Chen, Hu Chen:
Performance Analysis of Homogeneous On-Chip Large-Scale Parallel Computing Architectures for Data-Parallel Applications. J. Electr. Comput. Eng. 2015: 902591:1-902591:20 (2015)
[j29]
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  - journals/jsw/ChenLJCGCCL15
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Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen, Yang Guo, Shenggang Chen, Hu Chen, Man Liao:
Command-Triggered Microcode Execution for Distributed Shared Memory Based Multi-Core Network-on-Chips. J. Softw. 10(2): 142-161 (2015)
[c52]
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  dblp key:
  - conf/isvlsi/ChenLLJZCGLLWSC15
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Xiaowen Chen, Zhonghai Lu, Yang Li, Axel Jantsch, Xueqian Zhao, Shuming Chen, Yang Guo, Zonglin Liu, Jianzhuang Lu, Jianghua Wan, Shuwei Sun, Shenggang Chen, Hu Chen:
Achieving Memory Access Equalization Via Round-Trip Routing Latency Prediction in 3D Many-Core NoCs. ISVLSI 2015: 398-403
2013
[j25]
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  - journals/cee/ChenLJCCG13
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Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen, Shenggang Chen, Huitao Gu:
Reducing Virtual-to-Physical address translation overhead in Distributed Shared Memory based multi-core Network-on-Chips according to data property. Comput. Electr. Eng. 39(2): 596-612 (2013)
2011
[c42]
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  - conf/aspdac/ChenCXWLLC11
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Shuming Chen, Xiaowen Chen, Yi Xu, Jianghua Wan, Jianzhuang Lu, Xiangyuan Liu, Shenggang Chen:
Design and chip implementation of a heterogeneous multi-core DSP. ASP-DAC 2011: 91-92
[c40]
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  - conf/isvlsi/WangCWZC11
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Yaohua Wang, Shuming Chen, Jianghua Wan, Kai Zhang, Shenggang Chen:
AIFSP: An Adaptive Instruction Flow Stream Processor. ISVLSI 2011: 272-277
[c38]
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  - conf/nas/LiuCCCC11
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Sheng Liu, Shuming Chen, Haiyan Chen, Shenggang Chen, Hu Chen:
Supporting Efficient Memory Conflicts Reduction Using the DMA Cache Technique in Vector DSPs. NAS 2011: 302-308
2010
[j4]
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  - journals/tcsv/ChenCS10
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Shenggang Chen, Shuming Chen, Shuwei Sun:
P3-CABAC: A Nonstandard Tri-Thread Parallel Evolution of CABAC in the Manycore Era. IEEE Trans. Circuits Syst. Video Technol. 20(6): 920-924 (2010)
[c33]
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  - conf/hpcc/ChenCGCYCSLW10
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Shenggang Chen, Shuming Chen, Huitao Gu, Hu Chen, Yaming Yin, Xiaowen Chen, Shuwei Sun, Sheng Liu, Yaohua Wang:
Mapping of H.264/AVC Encoder on a Hierarchical Chip Multicore DSP Platform. HPCC 2010: 465-470
[c32]
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  - conf/ipps/ChenCY10
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Shenggang Chen, Shuming Chen, Yaming Yin:
Performance impact of SMP-cluster on the On-chip Large-scale Parallel Computing architecture. IPDPS Workshops 2010: 1-7
[c29]
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  - conf/pdcat/GuCSCC10
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Huitao Gu, Shuming Chen, Shuwei Sun, Shenggang Chen, Xiaowen Chen:
Multiple Search Centers Based Fast Motion Estimation Algorithm for H.264/AVC. PDCAT 2010: 346-350

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