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ORCIDDonghyuk Lee
- > Home > Persons > Donghyuk Lee
Publications
- 2018
[i23]Kevin K. Chang, Donghyuk Lee, Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Yoongu Kim, Onur Mutlu:
Reducing DRAM Refresh Overheads with Refresh-Access Parallelism. CoRR abs/1805.01289 (2018)- [i22]Yoongu Kim, Vivek Seshadri, Donghyuk Lee, Jamie Liu, Onur Mutlu:
Exploiting the DRAM Microarchitecture to Increase Memory-Level Parallelism. CoRR abs/1805.01966 (2018) - [i21]Donghyuk Lee, Yoongu Kim, Gennady Pekhimenko, Samira Manabi Khan, Vivek Seshadri, Kevin K. Chang, Onur Mutlu:
Adaptive-Latency DRAM: Reducing DRAM Latency by Exploiting Timing Margins. CoRR abs/1805.03047 (2018) - [i20]Donghyuk Lee, Yoongu Kim, Vivek Seshadri, Jamie Liu, Lavanya Subramanian, Onur Mutlu:
Tiered-Latency DRAM: Enabling Low-Latency Main Memory at Low Cost. CoRR abs/1805.03048 (2018) - [i15]Vivek Seshadri, Yoongu Kim, Chris Fallin, Donghyuk Lee, Rachata Ausavarungnirun, Gennady Pekhimenko, Yixin Luo, Onur Mutlu, Phillip B. Gibbons, Michael A. Kozuch, Todd C. Mowry:
RowClone: Accelerating Data Movement and Initialization Using DRAM. CoRR abs/1805.03502 (2018) - 2017
- [i10]Kevin K. Chang, Donghyuk Lee, Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Yoongu Kim, Onur Mutlu:
Improving DRAM Performance by Parallelizing Refreshes with Accesses. CoRR abs/1712.07754 (2017) - 2016
- [i9]Kevin Kai-Wei Chang, Donghyuk Lee, Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Yoongu Kim, Onur Mutlu:
Reducing Performance Impact of DRAM Refresh by Parallelizing Refreshes with Accesses. CoRR abs/1601.06352 (2016) - [i8]Donghyuk Lee, Yoongu Kim, Vivek Seshadri, Jamie Liu, Lavanya Subramanian, Onur Mutlu:
Tiered-Latency DRAM (TL-DRAM). CoRR abs/1601.06903 (2016) - [i7]Yoongu Kim, Ross Daly, Jeremie S. Kim, Chris Fallin, Ji-Hye Lee, Donghyuk Lee, Chris Wilkerson, Konrad Lai, Onur Mutlu:
RowHammer: Reliability Analysis and Security Implications. CoRR abs/1603.00747 (2016) - [i6]Donghyuk Lee, Yoongu Kim, Gennady Pekhimenko, Samira Manabi Khan, Vivek Seshadri, Kevin Kai-Wei Chang, Onur Mutlu:
Adaptive-Latency DRAM (AL-DRAM). CoRR abs/1603.08454 (2016) - 2015
- [c10]Donghyuk Lee, Yoongu Kim, Gennady Pekhimenko, Samira Manabi Khan, Vivek Seshadri, Kevin Kai-Wei Chang, Onur Mutlu:
Adaptive-latency DRAM: Optimizing DRAM timing for the common-case. HPCA 2015: 489-501 - 2014
- [c8]Kevin Kai-Wei Chang, Donghyuk Lee, Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Yoongu Kim, Onur Mutlu:
Improving DRAM performance by parallelizing refreshes with accesses. HPCA 2014: 356-367 - [c6]Yoongu Kim, Ross Daly, Jeremie S. Kim, Chris Fallin, Ji-Hye Lee, Donghyuk Lee, Chris Wilkerson, Konrad Lai, Onur Mutlu:
Flipping bits in memory without accessing them: An experimental study of DRAM disturbance errors. ISCA 2014: 361-372 - [c5]Samira Manabi Khan, Donghyuk Lee, Yoongu Kim, Alaa R. Alameldeen, Chris Wilkerson, Onur Mutlu:
The efficacy of error mitigation techniques for DRAM retention failures: a comparative experimental study. SIGMETRICS 2014: 519-532 - 2013
- [c4]Donghyuk Lee, Yoongu Kim, Vivek Seshadri, Jamie Liu, Lavanya Subramanian, Onur Mutlu:
Tiered-latency DRAM: A low latency and low cost DRAM architecture. HPCA 2013: 615-626 - [c3]Vivek Seshadri, Yoongu Kim, Chris Fallin, Donghyuk Lee, Rachata Ausavarungnirun, Gennady Pekhimenko, Yixin Luo, Onur Mutlu, Phillip B. Gibbons, Michael A. Kozuch, Todd C. Mowry:
RowClone: fast and energy-efficient in-DRAM bulk data copy and initialization. MICRO 2013: 185-197 - 2012
- [c2]Yoongu Kim, Vivek Seshadri, Donghyuk Lee, Jamie Liu, Onur Mutlu:
A case for exploiting subarray-level parallelism (SALP) in DRAM. ISCA 2012: 368-379
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