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Christian Piguet
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Publications
- 2013
- [c36]Marc Pons, Jean-Luc Nagel, Daniel Séverac, Marc-Nicolas Morgan, Daniel Sigg, Pierre-François Rüedi, Christian Piguet:
Ultra low-power standard cell design using planar bulk CMOS in subthreshold operation. PATMOS 2013: 9-15 - 2012
- [c32]Marc Pons, Jean-Luc Nagel, Christian Piguet:
Maximum delay variation temperature-aware standard cell design. ICECS 2012: 296-299 - 2011
- [c29]Lingamneni Avinash, Christian C. Enz, Jean-Luc Nagel, Krishna V. Palem, Christian Piguet:
Energy parsimonious circuit design through probabilistic pruning. DATE 2011: 764-769 - 2010
- [j21]Luca Benini, Alberto Bocca, Alberto Bonanno, Alberto Macii, Enrico Macii, Jean-Luc Nagel, Christian Piguet, Massimo Poncino:
A Refinement Methodology for Clock Gating Optimization at Layout Level in Digital Circuits. J. Low Power Electron. 6(1): 44-55 (2010) - 2009
- [j19]Claude Arm, Steve Gyger, Jean-Marc Masgonty, Marc-Nicolas Morgan, Jean-Luc Nagel, Christian Piguet, Flavio Rampogna, Patrick Volet:
Low-Power 32-bit Dual-MAC 120 µW/MHz 1.0 V icyflex1 DSP/MCU Core. IEEE J. Solid State Circuits 44(7): 2055-2064 (2009) - 2008
- [j18]Christian Piguet, Jean-Luc Nagel, Vincent Peiris, Steve Gyger, Daniel Séverac, Marc-Nicolas Morgan, Jean-Marc Masgonty:
Low-Power Heterogeneous Systems-on-Chips. J. Low Power Electron. 4(2): 111-126 (2008) - [c25]Claude Arm, Steve Gyger, Jean-Marc Masgonty, Marc Morgan, Jean-Luc Nagel, Christian Piguet, Flavio Rampogna, Patrick Volet:
Low-power 32-bit dual-MAC 120 μW/MHz 1.0 V icyflex DSP/MCU core. ESSCIRC 2008: 190-193 - 2006
- [c22]Christian Schuster, Jean-Luc Nagel, Christian Piguet, Pierre-André Farine:
Architectural and technology influence on the optimal total power consumption. DATE 2006: 989-994 - [c21]Christian Piguet, Christian Schuster, Jean-Luc Nagel:
Static and Dynamic Power Reduction by Architecture Selection. PATMOS 2006: 659-668 - 2005
- [j16]Christian Schuster, Christian Piguet, Jean-Luc Nagel, Pierre-André Farine:
An Architecture Design Methodology for Minimal Total Power Consumption at Fixed Vdd and Vth. J. Low Power Electron. 1(1): 3-10 (2005) - 2004
- [c18]Christian Schuster, Jean-Luc Nagel, Christian Piguet, Pierre-André Farine:
Leakage Reduction at the Architectural Level and Its Application to 16 Bit Multiplier Architectures. PATMOS 2004: 169-178
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