Jianghua Wan

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Xiaowen Chen

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Publications

2015
[c8]
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  - conf/isvlsi/ChenLLJZCGLLWSC15
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  persistent URL:
  - https://dblp.org/rec/conf/isvlsi/ChenLLJZCGLLWSC15
Xiaowen Chen, Zhonghai Lu, Yang Li, Axel Jantsch, Xueqian Zhao, Shuming Chen, Yang Guo, Zonglin Liu, Jianzhuang Lu, Jianghua Wan, Shuwei Sun, Shenggang Chen, Hu Chen:
Achieving Memory Access Equalization Via Round-Trip Routing Latency Prediction in 3D Many-Core NoCs. ISVLSI 2015: 398-403
2012
[j4]
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  - journals/cal/WangCZWCCW12
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  - https://dblp.org/rec/journals/cal/WangCZWCCW12
Yaohua Wang, Shuming Chen, Kai Zhang, Jianghua Wan, Xiaowen Chen, Hu Chen, Haibo Wang:
Instruction Shuffle: Achieving MIMD-like Performance on SIMD Architectures. IEEE Comput. Archit. Lett. 11(2): 37-40 (2012)
2011
[c3]
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  - conf/aspdac/ChenCXWLLC11
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Shuming Chen, Xiaowen Chen, Yi Xu, Jianghua Wan, Jianzhuang Lu, Xiangyuan Liu, Shenggang Chen:
Design and chip implementation of a heterogeneous multi-core DSP. ASP-DAC 2011: 91-92
2010
[j1]
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  - journals/jcst/ChenWLLSSLLLXa10
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Shuming Chen, Jianghua Wan, Jianzhuang Lu, Zhong Liu, Hai-Yan Sun, Yong-Jie Sun, Hengzhu Liu, Xiang-Yuan Liu, Zhentao Li, Yi Xu, Xiaowen Chen:
YHFT-QDSP: High-Performance Heterogeneous Multi-Core DSP. J. Comput. Sci. Technol. 25(2): 214-224 (2010)

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