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Arthur H. M. van Roermund
Publications
- 2019
- [j62]Maoqiang Liu, Arthur H. M. van Roermund, Pieter Harpe:
A 10-b 20-MS/s SAR ADC With DAC-Compensated Discrete-Time Reference Driver. IEEE J. Solid State Circuits 54(2): 417-427 (2019) - [j61]Ming Ding, Yao-Hong Liu, Pieter Harpe, Christian Bachmann, Kathleen Philips, Arthur H. M. van Roermund:
A Low-Power Fast Start-Up Crystal Oscillator With an Autonomous Dynamically Adjusted Load. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(4): 1382-1392 (2019) - 2018
- [j59]Ming Ding, Pieter Harpe, Guibin Chen, Benjamin Busze, Yao-Hong Liu, Christian Bachmann, Kathleen Philips, Arthur H. M. van Roermund:
A Hybrid Design Automation Tool for SAR ADCs in IoT. IEEE Trans. Very Large Scale Integr. Syst. 26(12): 2853-2862 (2018) - [c121]Ming Ding, Guibin Chen, Pieter Harpe, Benjamin Busze, Yao-Hong Liu, Christian Bachmann, Kathleen Philips, Arthur H. M. van Roermund:
A circuit-design-driven tool with a hybrid automation approach for SAR ADCs in IoT. DATE 2018: 672-675 - 2017
- [j56]Maoqiang Liu, Arthur H. M. van Roermund, Pieter Harpe:
A 7.1-fJ/Conversion-Step 88-dB SFDR SAR ADC With Energy-Free "Swap To Reset". IEEE J. Solid State Circuits 52(11): 2979-2990 (2017) - [c120]Maoqiang Liu, Arthur H. M. van Roermund, Pieter Harpe:
A 10b 20MS/s SAR ADC with a low-power and area-efficient DAC-compensated reference. ESSCIRC 2017: 231-234 - [c117]Maoqiang Liu, Arthur H. M. van Roermund, Pieter Harpe:
A 0.9V-VDD sub-nW resistor-less duty-cycled CMOS voltage reference in 65nm for IoT. ISCAS 2017: 1-4 - 2016
- [j55]Pieter Harpe, Hao Gao, Rainier van Dommele, Eugenio Cantatore, Arthur H. M. van Roermund:
A 0.20 mm2 3 nW Signal Acquisition IC for Miniature Sensor Nodes in 65 nm CMOS. IEEE J. Solid State Circuits 51(1): 240-248 (2016) - [j53]Maoqiang Liu, Kevin Pelzers, Rainier van Dommele, Arthur H. M. van Roermund, Pieter Harpe:
A106nW 10 b 80 kS/s SAR ADC With Duty-Cycled Reference Generation in 65 nm CMOS. IEEE J. Solid State Circuits 51(10): 2435-2445 (2016) - [c114]Maoqiang Liu, Arthur H. M. van Roermund, Pieter Harpe:
A 7.1fJ/conv.-step 88dB-SFDR 12b SAR ADC with energy-efficient swap-to-reset. ESSCIRC 2016: 409-412 - 2015
- [j49]Shuang Song, Michael Johannes Rooijakkers, Pieter Harpe, Chiara Rabotti, Massimo Mischi, Arthur H. M. van Roermund, Eugenio Cantatore:
A Low-Voltage Chopper-Stabilized Amplifier for Fetal ECG Monitoring With a 1.41 Power Efficiency Factor. IEEE Trans. Biomed. Circuits Syst. 9(2): 237-247 (2015) - [c108]Pieter Harpe, Hao Gao, Rainier van Dommele, Eugenio Cantatore, Arthur H. M. van Roermund:
21.2 A 3nW signal-acquisition IC integrating an amplifier with 2.1 NEF and a 1.5fJ/conv-step ADC. ISSCC 2015: 1-3 - [c107]Maoqiang Liu, Pieter Harpe, Rainier van Dommele, Arthur H. M. van Roermund:
15.4 A 0.8V 10b 80kS/s SAR ADC with duty-cycled reference generation. ISSCC 2015: 1-3 - [c106]Shuang Song, Michael Johannes Rooijakkers, Pieter Harpe, Chiara Rabotti, Massimo Mischi, Arthur H. M. van Roermund, Eugenio Cantatore:
A low-power frontend system for fetal ECG monitoring applications. IWASI 2015: 87-91 - 2014
- [c104]Shuang Song, Michael Johannes Rooijakkers, Pieter Harpe, Chiara Rabotti, Massimo Mischi, Arthur H. M. van Roermund, Eugenio Cantatore:
A multiple-channel frontend system with current reuse for fetal monitoring applications. ISCAS 2014: 253-256 - [c103]Gijs Meuleman, Pieter Harpe, Xiongchuan Huang, Arthur H. M. van Roermund:
A 19 µW 20 MHz All-Digital PLL for 2-tone envelope detection radios. ISCAS 2014: 321-324 - [c100]Hao Gao, Marion K. Matters-Kammerer, Pieter Harpe, Dusan M. Milosevic, Arthur H. M. van Roermund, Jean-Paul M. G. Linnartz, Peter G. M. Baltus:
A 60-GHz energy harvesting module with on-chip antenna and switch for co-integration with ULP radios in 65-nm CMOS with fully wireless mm-wave power transfer measurement. ISCAS 2014: 1640-1643 - [c98]Pieter Harpe, Eugenio Cantatore, Arthur H. M. van Roermund:
11.1 An oversampled 12/14b SAR ADC with noise reduction and linearity enhancements achieving up to 79.1dB SNDR. ISSCC 2014: 194-195 - 2013
- [j43]Pieter Harpe, Eugenio Cantatore, Arthur H. M. van Roermund:
A 10b/12b 40 kS/s SAR ADC With Data-Driven Noise Reduction Achieving up to 10.1b ENOB at 2.2 fJ/Conversion-Step. IEEE J. Solid State Circuits 48(12): 3011-3018 (2013) - [c95]Shuang Song, Michael Johannes Rooijakkers, Pieter Harpe, Chiara Rabotti, Massimo Mischi, Arthur H. M. van Roermund, Eugenio Cantatore:
A 430nW 64nV/vHz current-reuse telescopic amplifier for neural recording applications. BioCAS 2013: 322-325 - [c85]Pieter Harpe, Eugenio Cantatore, Arthur H. M. van Roermund:
A 2.2/2.7fJ/conversion-step 10/12b 40kS/s SAR ADC with Data-Driven Noise Reduction. ISSCC 2013: 270-271 - 2009
- [j31]Pieter J. A. Harpe, Johannes A. Hegt, Arthur H. M. van Roermund:
Analog calibration of channel mismatches in time-interleaved ADCs. Int. J. Circuit Theory Appl. 37(2): 301-318 (2009) - 2007
- [c56]Pieter Harpe, Hans Hegt, Arthur H. M. van Roermund:
Analog calibration of channel mismatches in time-interleaved ADCs. ECCTD 2007: 236-239 - [c53]Pieter Harpe, Hans Hegt, Arthur H. M. van Roermund:
Analysis of Open Loop Track-and-Hold Circuits. ICECS 2007: 1236-1239 - [c50]Georgi I. Radulov, Patrick J. Quinn, Pieter Harpe, Hans Hegt, Arthur H. M. van Roermund:
Parallel current-steering D/A Converters for Flexibility and Smartness. ISCAS 2007: 1465-1468 - [c49]Pieter Harpe, Athon Zanikopoulos, Hans Hegt, Arthur H. M. van Roermund:
Analog Calibration of Mismatches in an Open-Loop Track-and-Hold Circuit for Time-Interleaved ADCs. ISCAS 2007: 1951-1954 - [c48]Athon Zanikopoulos, Pieter Harpe, Hans Hegt, Arthur H. M. van Roermund:
Design of the Basic Building Block of a High-Speed Flexible and Modular Pipelined ADC. ISCAS 2007: 3876-3879 - 2006
- [c46]Athon Zanikopoulos, Pieter Harpe, Hans Hegt, Arthur H. M. van Roermund:
Power Optimization for Pipelined ADCs with Open-Loop Residue Amplifiers. ICECS 2006: 132-135 - [c45]Pieter Harpe, Athon Zanikopoulos, Hans Hegt, Arthur H. M. van Roermund:
Digital post-correction of front-end track-and-hold circuits in ADCs. ISCAS 2006 - 2005
- [c33]Arthur H. M. van Roermund, Hans Hegt, Pieter Harpe, Georgi I. Radulov, Athon Zanikopoulos, Konstantinos Doris, Patrick J. Quinn:
Smart AD and DA converters. ISCAS (4) 2005: 4062-4065 - [c32]Athon Zanikopoulos, Pieter Harpe, Hans Hegt, Arthur H. M. van Roermund:
A flexible ADC approach for mixed-signal SoC platforms. ISCAS (5) 2005: 4839-4842 - [c31]Pieter Harpe, Athon Zanikopoulos, Arthur H. M. van Roermund:
Digital self-correction of time-interleaved ADCs. ISCAS (6) 2005: 5541-5544
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