Peter Pirsch

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Johannes Kneip

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Publications

2000
[c37]
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Hans-Joachim Stolberg, Mladen Berekovic, Peter Pirsch, Holger Runge, Henning Möller, Johannes Kneip:
The M-PIRE MPEG-4 codec DSP and its macroblock engine. ISCAS 2000: 192-195
1999
[j17]
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Mladen Berekovic, Hans-Joachim Stolberg, Mark Bernd Kulaczewski, Peter Pirsch, Henning Möller, Holger Runge, Johannes Kneip, Benno Stabernack:
Instruction Set Extensions for MPEG-4 Video. J. VLSI Signal Process. 23(1): 27-49 (1999)
1998
[j15]
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Mladen Berekovic, Peter Pirsch, Johannes Kneip:
An Algorithm-Hardware-System Approach to VLIW Multimedia Processors. J. VLSI Signal Process. 20(1-2): 163-180 (1998)
[c28]
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Jens Peter Wittenburg, Willm Hinrichs, Johannes Kneip, Martin Ohmacht, Mladen Berekovic, Hanno Lieske, Helge Kloos, Peter Pirsch:
Realization of a Programmable Parallel DSP for High Performance Image Processing Applications. DAC 1998: 56-61
1997
[j13]
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Johannes Kneip, Mladen Berekovic, Jens Peter Wittenburg, Willm Hinrichs, Peter Pirsch:
An Algorithm Adapted Autonomous Controlling Concept for a Parallel Single-Chip Digital Signal Processor. J. VLSI Signal Process. 16(1): 31-40 (1997)
[c20]
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Johannes Kneip, Mladen Berekovic, Peter Pirsch:
An algorithm-hardware-system approach to VLIW multimedia processors. MMSP 1997: 433-438
1995
[j12]
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Johannes Kneip, Martin Ohmacht, Karsten Rönner, Peter Pirsch:
Architecture and C++-programming environment of a highly parallel image signal processor. Microprocess. Microprogramming 41(5-6): 391-408 (1995)
[c15]
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Peter Pirsch, Johannes Kneip, Karsten Rönner:
Parallelization Resources of Image Processing Algorithms and Their Mapping on a Programmable Parallel Videosignal Processor. ISCAS 1995: 562-565
1994
[c12]
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Johannes Kneip, Karsten Rönner, Peter Pirsch:
A data path array with shared memory as core of a high performance DSP. ASAP 1994: 271-282

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