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ORCIDHiroyuki Kondo
- > Home > Persons > Hiroyuki Kondo
Publications
- 2011
[j9]Toru Shimizu, Kazutami Arimoto, Osamu Nishii, Sugako Otani, Hiroyuki Kondo:
Low Power Platform for Embedded Processor LSIs. IEICE Trans. Electron. 94-C(4): 394-400 (2011)- [c17]Sugako Otani, Hiroyuki Kondo, Itaru Nonomura, Atsuyuki Ikeya, Minoru Uemura, Katsushi Asahina, Kazutami Arimoto, Shin'ichi Miura, Toshihiro Hanawa
, Taisuke Boku, Mitsuhisa Sato:
An 80 Gbps dependable multicore communication SoC with PCI express I/F and intelligent interrupt controller. COOL Chips 2011: 1-3 - [c16]Sugako Otani, Hiroyuki Kondo, Itaru Nonomura, Atsuyuki Ikeya, Minoru Uemura, Yasushi Hayakawa, Takeshi Oshita, Satoshi Kaneko, Katsushi Asahina, Kazutami Arimoto, Shin'ichi Miura, Toshihiro Hanawa, Taisuke Boku, Mitsuhisa Sato:
An 80Gb/s dependable communication SoC with PCI express I/F and 8 CPUs. ISSCC 2011: 266-268 - 2009
- [j6]Hiroyuki Kondo, Sugako Otani, Masami Nakajima, Osamu Yamamoto, Norio Masui, Naoto Okumura, Mamoru Sakugawa, Masaya Kitao, Koichi Ishimi, Masayuki Sato, Fumitaka Fukuzawa, Satoshi Imasu, Nobuhiro Kinoshita, Yusuke Ota, Kazutami Arimoto, Toru Shimizu:
Heterogeneous Multicore SoC With SiP for Secure Multimedia Applications. IEEE J. Solid State Circuits 44(8): 2251-2259 (2009) - 2008
- [j5]Hiroyuki Kondo, Masami Nakajima, Norio Masui, Sugako Otani, Naoto Okumura, Yukari Takata, Takashi Nasu, Hirokazu Takata, Takashi Higuchi, Mamoru Sakugawa, Hayato Fujiwara, Kazuya Ishida, Koichi Ishimi, Satoshi Kaneko, Teruyuki Itoh, Masayuki Sato, Osamu Yamamoto, Kazutami Arimoto:
Design and Implementation of a Configurable Heterogeneous Multicore SoC With Nine CPUs and Two Matrix Processors. IEEE J. Solid State Circuits 43(4): 892-901 (2008) - [c10]Hiroyuki Kondo, Masami Nakajima, Sugako Otani, Osamu Yamamoto, Norio Masui, Naoto Okumura, Mamoru Sakugawa, Masaya Kitao, Koichi Ishimi, Masayuki Sato, Fumitaka Fukuzawa, Kazuhiro Inaoka, Yoshihiro Saito, Kazutami Arimoto, Toru Shimizu:
Heterogeneous multicore SoC for secure multimedia applications. CICC 2008: 675-678 - 2007
- [j4]Hideyuki Noda, Masami Nakajima, Katsumi Dosaka, Kiyoshi Nakata, Motoki Higashida, Osamu Yamamoto, Katsuya Mizumoto, Tetsushi Tanizaki, Takayuki Gyohten, Yoshihiro Okuno, Hiroyuki Kondo, Yukihiko Shimazu, Kazutami Arimoto, Kazunori Saito, Toru Shimizu:
The Design and Implementation of the Massively Parallel Processor Based on the Matrix Architecture. IEEE J. Solid State Circuits 42(1): 183-192 (2007) - 2006
- [c7]Masami Nakajima, Hideyuki Noda, Katsumi Dosaka, Kiyoshi Nakata, Motoki Higashida, Osamu Yamamoto, Katsuya Mizumoto, Hiroyuki Kondo, Yukihiko Shimazu, Kazutami Arimoto, Kazunori Saitoh, Toru Shimizu:
A 40GOPS 250mW massively parallel processor based on matrix architecture. ISSCC 2006: 1616-1625
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