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ORCIDMatthias Keller
- > Home > Persons > Matthias Keller
Publications
- 2019
[c48]Jacob Göppert, Simon Braun, David Pellhammer, Mohammad Amayreh, Joachim Leicht, Matthias Keller, Yiannos Manoli:
Area Constrained Multi-Source Power Management for Thermoelectric Energy Harvesting. ESSCIRC 2019: 141-144- 2018
- [c46]Boyu Shui, Matthias Keller, Matthias Kuhl, Yiannos Manoli:
A 70.8 dB 0.0045 mm2 Low-power Continuous-Time Incremental Delta-Sigma Modulator for Multi-Site Neural Recording Interfaces. ISCAS 2018: 1-4 - 2017
- [c45]Mohammad Amayreh, Yiannos Manoli, Matthias Keller:
A 1.85 fA/√Hz fully integrated read-out interface for sub-pA current sensing applications. ESSCIRC 2017: 356-359 - 2015
- [c43]Chongjun Ding, Yiannos Manoli, Matthias Keller:
A 5.1mW 74dB DR CT ΔΣ modulator with quantizer intrinsic ELD compensation achieving 75fJ/conv.-step in a 20MHz BW. ESSCIRC 2015: 213-216 - [c42]Chongjun Ding, Yiannos Manoli, Matthias Keller:
Approaches to mitigating the impact of DAC mismatch on the performance of continuous-time delta-sigma modulators. ISCAS 2015: 329-332 - 2014
- [c39]Chongjun Ding, Yiannos Manoli, Matthias Keller:
A time-domain based multi-bit ADC for application in Delta-Sigma modulators. ISCAS 2014: 930-933 - 2013
- [c32]Chongjun Ding, Yiannos Manoli, Matthias Keller:
Approaches to the implementation of noise-coupling in continuous-time Delta-Sigma modulators. ISCAS 2013: 1047-1050 - 2012
- [c26]Mohamed Afifi, Ahmed Shahein, Michael Maurer, Matthias Keller, Yiannos Manoli:
A self calibration technique for tunable continuous-time bandpass delta-sigma modulators. ISCAS 2012: 2977-2980 - [c25]Chongjun Ding, Liang Zou, Matthias Keller, Yiannos Manoli:
Approaches to digital compensation of excess loop delay in continuous-time Delta-Sigma modulators using a scaled quantizer. ISCAS 2012: 3001-3004 - 2010
- [c12]Jens Sauerbrey, Jacinto San Pablo Garcia, Georgi Panov, Thomas Piorek, Xianghua Shen, Markus Schimper, Rudolf Koch, Matthias Keller, Yiannos Manoli, Maurits Ortmanns:
A configurable cascaded continuous-time ΔΣ modulator with up to 15MHz bandwidth. ESSCIRC 2010: 426-429 - 2008
- [j2]Matthias Keller, Alexander Buhmann, Jens Sauerbrey, Maurits Ortmanns, Yiannos Manoli:
A Comparative Study on Excess-Loop-Delay Compensation Techniques for Continuous-Time Sigma-Delta Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(11): 3480-3487 (2008) - [c6]Matthias Keller, Alexander Buhmann, Maurits Ortmanns, Yiannos Manoli:
Analysis of digital gain error compensation in continuous-time cascaded sigma-delta modulators. ISCAS 2008: 1874-1877 - 2007
- [j1]Matthias Keller, Alexander Buhmann, Friedel Gerfers, Maurits Ortmanns, Yiannos Manoli:
On the Implicit Anti-Aliasing Feature of Continuous-Time Cascaded Sigma-Delta Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(12): 2639-2645 (2007) - [c5]Matthias Keller, Alexander Buhmann, Maurits Ortmanns, Yiannos Manoli:
A Method for the Discrete-Time Simulation of Continuous-Time Sigma-Delta Modulators. ISCAS 2007: 241-244 - [c4]Matthias Keller, Alexander Buhmann, Maurits Ortmanns, Yiannos Manoli:
On the Implicit Anti-Aliasing Feature of Continuous-Time Multistage Noise-Shaping Sigma-Delta Modulators. ISCAS 2007: 721-724 - [c3]Alexander Buhmann, Matthias Keller, Maurits Ortmanns, Yiannos Manoli:
Estimating Circuit Nonidealities of Continuous-Time Multibit Delta-Sigma Modulators. ISCAS 2007: 2264-2267 - 2004
- [c1]Matthias Keller, Yiannos Manoli, Friedel Gerfers:
A calibration method for current steering digital to analog converters in continuous time multi-bit sigma delta modulators. ISCAS (1) 2004: 289-292
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