Jocelyn Sérot

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Maxime Pelcat

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Publications

2019
[j16]
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  - journals/esl/RubattuPSSSDRP19
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Claudio Rubattu, Francesca Palumbo, Carlo Sau, Rubén Salvador, Jocelyn Sérot, Karol Desnos, Luigi Raffo, Maxime Pelcat:
Dataflow-Functional High-Level Synthesis for Coarse-Grained Reconfigurable Accelerators. IEEE Embed. Syst. Lett. 11(3): 69-72 (2019)
2018
[i4]
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  - journals/corr/abs-1806-01683
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Kamel Abdelouahab, Maxime Pelcat, Jocelyn Sérot, François Berry:
Accelerating CNN inference on FPGAs: A Survey. CoRR abs/1806.01683 (2018)
2017
[j14]
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Kamel Abdelouahab, Maxime Pelcat, Jocelyn Sérot, Cédric Bourrasset, François Berry:
Tactics to Directly Map CNN Graphs on Embedded FPGAs. IEEE Embed. Syst. Lett. 9(4): 113-116 (2017)
[i3]
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Kamel Abdelouahab, Cédric Bourrasset, Maxime Pelcat, François Berry, Jean-Charles Quinton, Jocelyn Sérot:
A Holistic Approach for Optimizing DSP Block Utilization of a CNN implementation on FPGA. CoRR abs/1703.09779 (2017)
[i2]
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Kamel Abdelouahab, Maxime Pelcat, Jocelyn Sérot, François Berry, Cédric Bourrasset, Jean-Charles Quinton:
Hardware Automated Dataflow Deployment of CNNs. CoRR abs/1705.04543 (2017)
[i1]
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  - journals/corr/abs-1712-04322
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Kamel Abdelouahab, Maxime Pelcat, Cédric Bourrasset, François Berry, Jocelyn Sérot:
Tactics to Directly Map CNN graphs on Embedded FPGAs. CoRR abs/1712.04322 (2017)
2016
[c31]
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Kamel Abdelouahab, Cédric Bourrasset, Maxime Pelcat, François Berry, Jean-Charles Quinton, Jocelyn Sérot:
A Holistic Approach for Optimizing DSP Block Utilization of a CNN implementation on FPGA. ICDSC 2016: 69-75
[c30]
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Sébastien Caux, Edouard Hendrickx, François Berry, Maxime Pelcat, Jocelyn Sérot:
Demo GPStudio: a toolchain for FPGA-based Smart Cameras: Demo Paper. ICDSC 2016: 214-215

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