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Pooria M. Yaghini

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Ashkan Eghbal

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Publications

2018
[j8]
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Freek Verbeek, Pooria M. Yaghini, Ashkan Eghbal, Nader Bagherzadeh:
A Compositional Approach for Verifying Protocols Running on On-Chip Networks. IEEE Trans. Computers 67(7): 905-919 (2018)
2017
[j7]
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Freek Verbeek, Pooria M. Yaghini, Ashkan Eghbal, Nader Bagherzadeh:
Deadlock Verification of Cache Coherence Protocols and Communication Fabrics. IEEE Trans. Computers 66(2): 272-284 (2017)
2016
[j6]
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Pooria M. Yaghini, Ashkan Eghbal, Siavash S. Yazdi, Nader Bagherzadeh, Michael M. Green:
Capacitive and Inductive TSV-to-TSV Resilient Approaches for 3D ICs. IEEE Trans. Computers 65(3): 693-705 (2016)
[c9]
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  - conf/date/VerbeekYEB16
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Freek Verbeek, Pooria M. Yaghini, Ashkan Eghbal, Nader Bagherzadeh:
ADVOCAT: Automated deadlock verification for on-chip cache coherence and interconnects. DATE 2016: 1640-1645
2015
[j5]
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  - journals/integration/YaghiniEB15
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Pooria M. Yaghini, Ashkan Eghbal, Nader Bagherzadeh:
On the design of hybrid routing mechanism for mesh-based network-on-chip. Integr. 50: 183-192 (2015)
[j4]
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  - journals/jetc/KhayambashiYEB15
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Misagh Khayambashi, Pooria M. Yaghini, Ashkan Eghbal, Nader Bagherzadeh:
Analytical Reliability Analysis of 3D NoC under TSV Failure. ACM J. Emerg. Technol. Comput. Syst. 11(4): 43:1-43:16 (2015)
[j3]
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  - journals/tc/EghbalYBK15
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Ashkan Eghbal, Pooria M. Yaghini, Nader Bagherzadeh, Misagh Khayambashi:
Analytical Fault Tolerance Assessment and Metrics for TSV-Based 3D Network-on-Chip. IEEE Trans. Computers 64(12): 3591-3604 (2015)
[j2]
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Pooria M. Yaghini, Ashkan Eghbal, Misagh Khayambashi, Nader Bagherzadeh:
Coupling Mitigation in 3-D Multiple-Stacked Devices. IEEE Trans. Very Large Scale Integr. Syst. 23(12): 2931-2944 (2015)
[c8]
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  - conf/nocs/YaghiniEYB15
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Pooria M. Yaghini, Ashkan Eghbal, Siavash S. Yazdi, Nader Bagherzadeh:
Accurate System-level TSV-to-TSV Capacitive Coupling Fault Model for 3D-NoC. NOCS 2015: 3:1-3:8
[c7]
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Ashkan Eghbal, Pooria M. Yaghini, Nader Bagherzadeh:
Capacitive Coupling Mitigation for TSV-based 3D ICs. VTS 2015: 1-6
2014
[c6]
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  - conf/dft/EghbalYYB14
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Ashkan Eghbal, Pooria M. Yaghini, Siavash S. Yazdi, Nader Bagherzadeh:
TSV-to-TSV inductive coupling-aware coding scheme for 3D Network-on-Chip. DFT 2014: 92-97
[c5]
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  - conf/isca/YaghiniEB14
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Pooria M. Yaghini, Ashkan Eghbal, Nader Bagherzadeh:
A GALS Router for Asynchronous Network-on-Chip. MES 2014: 52-55
2011
[j1]
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  - journals/jsa/YaghiniEPZ11
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Pooria M. Yaghini, Ashkan Eghbal, Hossein Pedram, Hamid R. Zarandi:
Investigation of transient fault effects in synchronous and asynchronous Network on Chip router. J. Syst. Archit. 57(1): 61-68 (2011)
2010
[c4]
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  - conf/pdp/YaghiniEPZ10
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Pooria M. Yaghini, Ashkan Eghbal, Hossein Pedram, Hamid R. Zarandi:
Investigation of Transient Fault Effects in an Asynchronous NoC Router. PDP 2010: 540-545
2009
[c2]
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  - conf/iolts/EghbalYPZ09
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Ashkan Eghbal, Pooria M. Yaghini, Hossein Pedram, Hamid R. Zarandi:
Fault injection-based evaluation of a synchronous NoC router. IOLTS 2009: 212-214
[c1]
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  - conf/latw/EghbalZY09
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Ashkan Eghbal, Hamid R. Zarandi, Pooria M. Yaghini:
Fault tolerance assessment of PIC microcontroller based on fault injection. LATW 2009: 1-6

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