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ORCIDWilliam Y. Chen
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Publications
- 1998
[c14]Pohua P. Chang, Scott A. Mahlke, William Y. Chen, Nancy J. Warter, Wen-mei W. Hwu:
IMPACT: An Architectural Framework for Multiple-Instruction-Issue Processors. 25 Years ISCA: Retrospectives and Reprints 1998: 408-417- 1995
- [j7]Pohua P. Chang, Daniel M. Lavery, Scott A. Mahlke, William Y. Chen, Wen-mei W. Hwu:
The Importance of Prepass Code Scheduling for Superscalar and Superpipelined Processors. IEEE Trans. Computers 44(3): 353-370 (1995) - [j6]Pohua P. Chang, Nancy J. Warter, Scott A. Mahlke, William Y. Chen, Wen-mei W. Hwu:
Three Architecutral Models for Compiler-Controlled Speculative Execution. IEEE Trans. Computers 44(4): 481-494 (1995) - 1993
- [j4]William Y. Chen, Pohua P. Chang, Thomas M. Conte, Wen-mei W. Hwu:
The Effect of Code Expanding Optimizations on Instruction Cache Design. IEEE Trans. Computers 42(9): 1045-1057 (1993) - [j3]Wen-mei W. Hwu, Scott A. Mahlke, William Y. Chen, Pohua P. Chang, Nancy J. Warter, Roger A. Bringmann, Roland G. Ouellette, Richard E. Hank, Tokuzo Kiyohara, Grant E. Haab, John G. Holm, Daniel M. Lavery:
The superblock: An effective technique for VLIW and superscalar compilation. J. Supercomput. 7(1-2): 229-248 (1993) - 1992
- [j1]Pohua P. Chang, Scott A. Mahlke, William Y. Chen, Wen-mei W. Hwu:
Profile-guided Automatic Inline Expansion for C Programs. Softw. Pract. Exp. 22(5): 349-369 (1992) - [c9]William Y. Chen, Scott A. Mahlke, Wen-mei W. Hwu, Tokuzo Kiyohara, Pohua P. Chang:
Tolerating data access latency with register preloading. ICS 1992: 104-113 - 1991
- [c4]Scott A. Mahlke, Nancy J. Warter, William Y. Chen, Pohua P. Chang, Wen-mei W. Hwu:
The Effect of Compiler Optimizations on Available Parallelism in Scalar Programs. ICPP (2) 1991: 142-145 - [c3]Pohua P. Chang, Scott A. Mahlke, William Y. Chen, Nancy J. Warter, Wen-mei W. Hwu:
IMPACT: An Architectural Framework for Multiple-Instruction-Issue Processors. ISCA 1991: 266-275 - [c2]Pohua P. Chang, William Y. Chen, Scott A. Mahlke, Wen-mei W. Hwu:
Comparing Static and Dynamic Code Scheduling for Multiple-Instruction-Issue Processors. MICRO 1991: 25-33 - [c1]William Y. Chen, Scott A. Mahlke, Pohua P. Chang, Wen-mei W. Hwu:
Data Access Microarchitectures for Superscalar Processors with Compiler-Assisted Data Prefetching. MICRO 1991: 69-73
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